At the end of the lens is AMD Strix Halo, the company’s ZEN 5-based mobile APU unit equipped with an extremely capable iGPU – iPon

Many ZEN 5-based processors may appear in AMD’s range in the not-so-distant future, among which there will also be a development named Strix Halo. This is primarily aimed at ultraportable notebooks that don’t really have a way to use a separate dedicated video card, so the iGPU of the mobile APU must be powerful enough to run modern games on it. In essence, this is the driving force behind Strix Halo, which will be special in several ways.

The members of the new APU series will be chiplet-based in the same way as the members of the Fire Range series, which strengthen the camp of the next-generation RYZEN 9000 series desktop processors, but they come in BGA format, soldered to the motherboard. While the Fire Range operates with a “basic” iGPU, which can be accompanied by a powerful dGPU, the Strix Halo already largely relies on the capabilities of the iGPU and accordingly needs sufficiently high performance.

Although all three listed models have one or two ZEN 5-based CCDs connected to a cIOD chip with the most important I/O controllers on board, in the case of the Strix Halo the iGPU section will be thoroughly kneaded, and the memory controller is not the usual DDR5 will be a copy, but a 256-bit LPDDR5X-based version, which is not present on the classic cIOD chip. This is necessary because the relatively high-performance iGPU built around the RDNA 3+ architecture needs a lot of memory bandwidth to perform optimally, and at the same time other components must be served efficiently. With this solution, AMD can essentially compete in the league of Apple’s M3 Pro and M3 Max, already in terms of performance, consumption and chip size.

The star of the show here will therefore be the iGPU, which can have a maximum of 40 RDNA 3+-based CU blocks in total, but there are obviously versions boasting more modest firepower, depending on the model. The iGPU can therefore have a maximum of 2560 stream units, 80 AI cores, 40 RT cores, 160 texturizers, and at least 64 rendering units. According to the news, the iGPU boost clock will reach up to 3 GHz.

A 256-bit memory controller with a total of four memory channels and eight subchannels supplies this “powerhouse” with an adequate amount of memory bandwidth, which can mean a cached memory bandwidth of around 500 GB/s thanks to the LPDDR5X-8533 MHz memory chips. In addition to the memory controllers, 32 MB of L4 Cache is also connected, which takes up space on the SoC chip. According to the current state of things, this can be accessed not only by the iGPU, but also by the CPU cores – it can be considered a kind of Infinity Cache cache.

The SoC also gets a powerful NPU, i.e. a neural processing unit, which can accelerate AI-based workflows. It is expected to be built around the XDNA 2 architecture and have the same performance as the instance on board the Strix Point APU units, i.e. a computing power of around 45-50 TOP/s should be considered. By the way, the iGPU itself can even reach the level of the GeForce RTX 4060M Laptop GPU or the GeForce RTX 4070M Laptop GPU, already in terms of performance, but this is just a rumor for now.

The processor cores are expected to be available in the form of one or two CCDs, of course on ZEN 5 bases, so a maximum of 16 processor cores, a maximum of 32 threads and a maximum of 2 x 32 MB of L3 Cache can be present on board. The CCDs are expected to communicate with the rest of the SoC through an IFOP (Infinity Fabric over Package) connector, as you can expect on the Fire Range and Granite Ridge models, but AMD engineers may even use the Infinity Fanout process, which is the chiplet-based RDNA 3 already proven for video cards.

Due to the target area, the I/O department will be different from what is used for the Fire Range models, where a powerful mobile video card is also added to the mobile APU. Strix Halo is expected to receive only 12 PCI Express 5.0 lanes in total, four of which are M .2 slot, and the other eight can be used by a possible dGPU or any other component. Since it will mainly be about iGPU-based systems, the remaining PCI Express lanes can be used to serve additional M.2 slots or other controllers. The SoC also offers a 40 Gbps USB4 controller as well as a 20 Gbps USB 3.2 Gen2 controller.